Many different types of active devices can be formed on a single chip or wafer. These devices can be, for example, field effect transistors (FETs) and bipolar transistors, e.g., NPN type transistors. These different devices can be formed on the same chip or wafer using process similar to mainstream CMOS processes, e.g., deposition, lithography and etching processes. For example, the resistances of the base and collector regions of the bipolar transistors and the contacts (e.g., source and drain) of the FETs can be optimized using the same cobalt or nickel silicide processes.
However, in the process of forming the contact vias (openings) for the bipolar transistors and the FETs, contaminant material can form on the sidewalls of the vias or openings, as well as the contact regions for these devices. For example, oxide can be sputtered onto the sidewalls of the contact vias and silicided contact regions for the FETs and bipolar transistors, as well as on the emitter region of the bipolar transistor. This contaminant can form during contact etch and resist stripping processes where native oxide growth occurs.
A buffered hydrofluoric acid (BHF) process is used to clean the oxide in the emitter region of the bipolar transistor. However, this cleaning process can degrade the contact resistance of the cobalt or nickel silicide region for other contacts, e.g., source and drain contacts for the FETs and the base and collector of the bipolar transistor. On the other hand, a cleaning step used to remove the oxide from the silicide contacts may not be very effective for the emitter region, resulting in a poor contact to the emitter.